Authors: Ravi Budruk, Don Anderson, Tom Stanley, Don Anderson, Tom Shanley
ISBN-13: 9780321156303, ISBN-10: 0321156307
Format: Paperback
Publisher: Addison-Wesley
Date Published: September 2003
Edition: (Non-applicable)
Ravi Budruk is a senior staff engineer and instructor with MindShare, Inc., where he has trained hundreds of engineers. He is an industry expert on such topics as Intel Processor and PC architecture, as well as such bus architectures as PCI Express, PCI, PCI-X, HyperTransport, IEEE 1394, and ISA. Before working at MindShare, Mr. Budruk was a PC chipset architect and designer at VLSI Technology, Inc.
Don Anderson is the author of many MindShare books. He passes on his wealth of experience in digital electronics and computer design by training engineers, programmers, and technicians for MindShare.
Tom Shanley, president of MindShare, Inc., is one of the world's foremost authorities on computer system architecture. In the course of his career, he has trained thousands of engineers in hardware and software design.
MindShare, Inc. is one of the leading technical training companies in the hardware industry, providing innovative courses for dozens of companies, including Intel, IBM, and Compaq.
"We have always recommended these books to our customers and even our own engineers for developing a better understanding of technologies and specifications. We find the latest PCI Express book from MindShare to have the same content and high quality as all the others."
—Nader Saleh, CEO/President, Catalyst Enterprises, Inc.
PCI Express is the third-generation Peripheral Component Inter-connect technology for a wide range of systems and peripheral devices. Incorporating recent advances in high-speed, point-to-point interconnects, PCI Express provides significantly higher performance, reliability, and enhanced capabilities—at a lower cost—than the previous PCI and PCI-X standards. Therefore, anyone working on next-generation PC systems, BIOS and device driver development, and peripheral device design will need to have a thorough understanding of PCI Express.
PCI Express System Architecture provides an in-depth description and comprehensive reference to the PCI Express standard. The book contains information needed for design, verification, and test, as well as background information essential for writing low-level BIOS and device drivers. In addition, it offers valuable insight into the technology's evolution and cutting-edge features.
Following an overview of the PCI Express architecture, the book moves on to cover transaction protocols, the physical/electrical layer, power management, configuration, and more. Specific topics covered include:
Thoughtfully organized, featuring a plethora of illustrations, and comprehensive in scope, PCI Express System Architecture is an essential resource for anyone working with this important technology.
MindShare's PC System Architecture Series is a crisply written and comprehensive set of guides to the most important PC hardware standards. Books in the series are intended for use by hardware and software designers, programmers, and support personnel.
About This Book | ||
Ch. 1 | Architectural Perspective | |
Ch. 2 | Architecture Overview | |
Ch. 3 | Address Spaces & Transaction Routing | |
Ch. 4 | Packet-Based Transactions | |
Ch. 5 | ACK/NAK Protocol | |
Ch. 6 | QoS/TCs/VCs and Arbitration | |
Ch. 7 | Flow Control | |
Ch. 8 | Transaction Ordering | |
Ch. 9 | Interrupts | |
Ch. 10 | Error Detection and Handling | |
Ch. 11 | Physical Layer Logic | |
Ch. 12 | Electrical Physical Layer | |
Ch. 13 | System Reset | |
Ch. 14 | Link Initialization & Training | |
Ch. 15 | Power Budgeting | |
Ch. 16 | Power Management | |
Ch. 17 | Hot Plug | |
Ch. 18 | Add-in Cards and Connectors | |
Ch. 19 | Configuration Overview | |
Ch. 20 | Configuration Mechanisms | |
Ch. 21 | PCI Express Enumeration | |
Ch. 22 | PCI Compatible Configuration Registers | |
Ch. 23 | Expansion ROMs | |
Ch. 24 | Express-Specific Configuration Registers | |
App. A | Test, Debug and Verification | |
App. B | Markets & Applications for the PCI Express Architecture | |
App. C | Implementing Intelligent Adapters and Multi-Host Systems With PCI Express Technology | |
App. D | Class Codes | |
App. E | Locked Transactions Series | |
Index |
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